FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter
Suranjana Julius and Anh Dinh
Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, S7N 5A2, Canada
Online:2011-09-25
Published:2011-09-25
About author:Suranjana Julius (suj967@mail.usask.ca) received her BSc degree in electronics and communication engineering from Bangalore University in 2002. Between 2002 and 2007, she worked in India and South Africa in various R&D positions and also worked as an applications engineer. Suranjana received her M.Sc. degree from the University of Saskatchewan, Canada, in 2010. Her research interests include digital signal processing, software defined radio, and digital logic design for FPGAs.
Anh Dinh (anh.dinh@usask.ca) received his B.Sc. degree in electrical and computer engineering from Lakehead University, Canada, in 1992. He received his M.Sc. and Ph.D. degrees from the University of Regina, Canada, in 1997 and 2000. He currently works at the Department of Electrical and Computer Engineering at the University of Saskatchewan. His research interests include biosensors and very large scale integration (VLSI) for wireless communications.
Suranjana Julius and Anh Dinh. FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter[J]. ZTE Communications, 2011, 9(3): 22-27.