A Novel De-Embedding Technique of Packaged GaN Transistors

doi:10.12142/ZTECOM.202102010

ZTE Communications ›› 2021, Vol. 19 ›› Issue (2): 77-81.DOI: 10.12142/ZTECOM.202102010

收稿日期:2020-03-04 出版日期:2021-06-25 发布日期:2021-07-27

A Novel De-Embedding Technique of Packaged GaN Transistors

WEI Xinghui(), CHEN Xiaofan, CHEN Wenhua, ZHOU Junmin

Tsinghua University, Beijing 100084, China

Received:2020-03-04 Online:2021-06-25 Published:2021-07-27
About author:WEI Xinghui (784999315@qq.com) received the B.S. degree in electronic information engineering from Xidian University, China in 2017, and the M.Sc. Degree in electronics and communication engineering from Tsinghua University, China in 2020. Her research interests include the technologies of high efficiency and high linearity Doherty power amplifiers.|CHEN Xiaofan received the B.S., M.Sc., and Ph.D. degrees in electronic engineering from Tsinghua University, China in 2005, 2014, and 2017, respectively. From 2005 to 2011, he was a microwave engineer with Tongfang Co., Ltd., China, where he was also with the Broadcasting Transmitters Group and designed high-power amplifiers. He is currently a Post-Doctoral Fellow with the Department of Electronic Engineering, Tsinghua University. His current interests include broadband/dual-band RF power amplifier (PA) design, linearization of RF PAs, and multimode/multiband transmitting systems.|ZHOU Junmin received the B.S. degree in College of Optoelectronic Engineering from Chongqing University, China. His current research interests include broadband high-efficiency RF power amplifier design, and research on integrated passive device.

摘要/Abstract

Abstract:

This paper presents a novel de-embedding technique of packaged high-power transistors. With the proposed technique, the packaged model of the power amplifier (PA) tube can be divided into the frequency independent de-embedded intrinsic device (DID) and the frequency dependent internal parasitic network (IPN), which is of great help in reducing the design complexity of a broadband PA. Different from the conventional technique of parasitic extraction, the proposed technique only requires external measurements. The frequency independent characteristic of DID is verified and the IPN is modeled and calibrated for a 50 W gallium-nitride (GaN) transistor. At last, a broadband Doherty PA is fabricated with the de-embedding technique. According to the measured results, the PA exhibits satisfactory power and efficiency performance.

Key words: de-embedding, power amplifier, intrinsic device, parasitic network

. [J]. ZTE Communications, 2021, 19(2): 77-81.

WEI Xinghui, CHEN Xiaofan, CHEN Wenhua, ZHOU Junmin. A Novel De-Embedding Technique of Packaged GaN Transistors[J]. ZTE Communications, 2021, 19(2): 77-81.

图/表 11

Figure 1 Conventional Doherty power amplifier (DPA) design

Figure 2 De-embedding technique of packaged model

Figure 3 Methods to extract parasitic parameters

Figure 4 Input and output parasitic parameters networks

Table1 Values of the components in the parasitic model

Component	Value	Component	Value
Z1	0.36 Ω	C2	11.93 pF
Z2	6.05 Ω	C3	1.88 pF
L1	3.44 pH	C4	609.68 fF
L2	5.29 pH	C5	61.41 fF
C1	4.18 fF

Figure 5 Small signal simulation results of (a) the input network and (b) the output network

Figure 6 The 6.9 Ω through reflection line (TRL) measurement fixture

Figure 7 Calibrated accurate parasitic parameter model

Table 2 Values of the components in the calibrated model

Component	Value	Component	Value
Z1	0.56 Ω	C1	1.90 pF
Z2	26.39 Ω	C2	196.27 fF
L1	128.22 pH	C3	9.97 pF
L2	492.62 pH	C4	3.73 pF
L3	15.04 pH	C5	17.53 fF
L4	460.77 pH	C6	1.47 pF
L5	52.70 pH	C7	571.46 fF
L6	108.9 pH

Figure 8 Simulation results: (a) output power; (b) efficiency; (c) gain

Figure 9 Measured (a) drain efficiency and (b) gain of the fabricated DPA

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A Novel De-Embedding Technique of Packaged GaN Transistors

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