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ZTE Communications ›› 2011, Vol. 9 ›› Issue (4): 35-41.

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A Histogram-Based Static-Error Correction Technique for Flash ADCs

Armin Jalili1, J Jacob Wikner2, Sayed Masoud Sayedi1, and Rasoul Dehghani1   

  1. 1. Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan 84156-83111, Iran;
    2. Department of Electrical Engineering, Link?ping University, SE-581 83 Link?ping, Sweden
  • 出版日期:2011-12-25 发布日期:2011-12-25
  • 作者简介:Armin Jalili (arminj@ec.iut.ac.ir) received his B.Sc. and M.Sc. degrees in electrical engineering from Isfahan University of Technology (IUT) in 2004 and 2006. He is currently working towards his Ph.D. degree in electrical engineering at IUT. His research interests include ADC design.

    J. Jacob Wikner (jacob.wikner@liu.se) received his Ph.D. from the Department of Electrical Engineering, Link?ping University, Sweden, in 2001. He has worked as a research engineer at Ericsson Microelectronics, senior analog design engineer at Infineon Technologies, and senior design engineer and chip architect at Sicon Semiconductor. Dr. Wikner has been an associate professor at Link?ping University since 2009. His research interests include biologically inspired architectures, high-speed ADC and DAC, and general analog and mixed-signal design. He holds six patents, has published 40 scientific papers, and has co-authored“CMOS Data Converters for Telecommunications.”He is the co-founder of CogniCatus and AnaCatum Design.

    Sayed Masoud Sayedi (m_sayedi@cc.iut.ac.ir) received his B.Sc. and M.Sc. degrees in electrical engineering from Isfahan University of Technology (IUT), Iran, in 1986 and 1988. He received his Ph.D. degree in electronics from Concordia University in 1996. From 1988 to 1992, and since 1997, he has worked at IUT, where he is currently an associate professor in the Department of Electrical and Computer Engineering. His research interests include VLSI fabrication processes, low power VLSI circuits, vision sensors, and data converters.

    Rasoul Dehghani (dehghani@cc.iut.ac.ir ) received his B.S.E.E., M.Sc., and PhD degrees in electrical engineering from Sharif University of Technology (SUT), Iran, in 1988, 1991 and 2004. From 1987 to 1991, he worked on design and implementation of different electronic circuits and systems at SUT. From 1991 to 1998, he was involved in implementing various electronic circuits focused on industrial applications. From 1998 to 2004, he worked with Emad Co. in Tehran and Jaalaa Company in Kuala Lumpur as a senior design engineer. Since 2006, he has been an assistant professor at IUT. His research interests include RF IC design for wireless communication, frequency synthesis, and low-voltage low-power circuits.

A Histogram-Based Static-Error Correction Technique for Flash ADCs

Armin Jalili1, J Jacob Wikner2, Sayed Masoud Sayedi1, and Rasoul Dehghani1   

  1. 1. Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan 84156-83111, Iran;
    2. Department of Electrical Engineering, Link?ping University, SE-581 83 Link?ping, Sweden
  • Online:2011-12-25 Published:2011-12-25
  • About author:Armin Jalili (arminj@ec.iut.ac.ir) received his B.Sc. and M.Sc. degrees in electrical engineering from Isfahan University of Technology (IUT) in 2004 and 2006. He is currently working towards his Ph.D. degree in electrical engineering at IUT. His research interests include ADC design.

    J. Jacob Wikner (jacob.wikner@liu.se) received his Ph.D. from the Department of Electrical Engineering, Link?ping University, Sweden, in 2001. He has worked as a research engineer at Ericsson Microelectronics, senior analog design engineer at Infineon Technologies, and senior design engineer and chip architect at Sicon Semiconductor. Dr. Wikner has been an associate professor at Link?ping University since 2009. His research interests include biologically inspired architectures, high-speed ADC and DAC, and general analog and mixed-signal design. He holds six patents, has published 40 scientific papers, and has co-authored“CMOS Data Converters for Telecommunications.”He is the co-founder of CogniCatus and AnaCatum Design.

    Sayed Masoud Sayedi (m_sayedi@cc.iut.ac.ir) received his B.Sc. and M.Sc. degrees in electrical engineering from Isfahan University of Technology (IUT), Iran, in 1986 and 1988. He received his Ph.D. degree in electronics from Concordia University in 1996. From 1988 to 1992, and since 1997, he has worked at IUT, where he is currently an associate professor in the Department of Electrical and Computer Engineering. His research interests include VLSI fabrication processes, low power VLSI circuits, vision sensors, and data converters.

    Rasoul Dehghani (dehghani@cc.iut.ac.ir ) received his B.S.E.E., M.Sc., and PhD degrees in electrical engineering from Sharif University of Technology (SUT), Iran, in 1988, 1991 and 2004. From 1987 to 1991, he worked on design and implementation of different electronic circuits and systems at SUT. From 1991 to 1998, he was involved in implementing various electronic circuits focused on industrial applications. From 1998 to 2004, he worked with Emad Co. in Tehran and Jaalaa Company in Kuala Lumpur as a senior design engineer. Since 2006, he has been an assistant professor at IUT. His research interests include RF IC design for wireless communication, frequency synthesis, and low-voltage low-power circuits.

摘要: High-speed, high-accuracy data converters are attractive for use in most RF applications. Such converters allow direct conversion to occur between the digital baseband and the antenna. However, high speed and high accuracy make the analog components in a converter more complex, and this complexity causes more power to be dissipated than if a traditional approach were taken. A static calibration technique for flash analog-to-digital converters (ADCs) is discussed in this paper. The calibration is based on histogram test methods, and equivalent errors in the flash ADC comparators are estimated in the digital domain without any significant changes being made to the ADC comparators. In the trimming process, reference voltages are adjusted to compensate for static errors. Behavioral-level simulations of a moderate-resolution 8-bit flash ADC show that, for typical errors, ADC performance is considerably improved by the proposed technique. As a result of calibration, the differential nonlinearities (DNLs) are reduced on average from 4 LSB to 0.5 LSB, and the integral nonlinearities (INLs) are reduced on average from 4.2 LSB to 0.35 LSB. Implementation issues for this proposed technique are discussed in our subsequent paper,“A Histogram-Based Static-Error Correction Technique for Flash ADCs: Implementation Aspects.”

关键词: Calibration, flash ADC, offset, trimming, uniform distribution

Abstract: High-speed, high-accuracy data converters are attractive for use in most RF applications. Such converters allow direct conversion to occur between the digital baseband and the antenna. However, high speed and high accuracy make the analog components in a converter more complex, and this complexity causes more power to be dissipated than if a traditional approach were taken. A static calibration technique for flash analog-to-digital converters (ADCs) is discussed in this paper. The calibration is based on histogram test methods, and equivalent errors in the flash ADC comparators are estimated in the digital domain without any significant changes being made to the ADC comparators. In the trimming process, reference voltages are adjusted to compensate for static errors. Behavioral-level simulations of a moderate-resolution 8-bit flash ADC show that, for typical errors, ADC performance is considerably improved by the proposed technique. As a result of calibration, the differential nonlinearities (DNLs) are reduced on average from 4 LSB to 0.5 LSB, and the integral nonlinearities (INLs) are reduced on average from 4.2 LSB to 0.35 LSB. Implementation issues for this proposed technique are discussed in our subsequent paper,“A Histogram-Based Static-Error Correction Technique for Flash ADCs: Implementation Aspects.”

Key words: Calibration, flash ADC, offset, trimming, uniform distribution